Generative Hardware, SiP, Edge AI & IoT Solutions
In-depth articles from our team on SiP packaging, edge AI, thermal design, and manufacturing. Field measurements, design decisions, and the thinking behind our generative hardware vision.
The processor, memory and power management design that repeats in every project comes down from months to days with Nar Series SiP products. A single SiP instead of more than 100 components, up to 61% board area savings.
Processor, memory, power management and communication come together in one package. A single SiP instead of more than 100 components, up to 61% board area savings and a simpler supply chain.
Corezzle takes on SiP design, signal integrity, power sequencing and thermal management risk. Re-spin risk drops and you stay focused on your product.
The processor, memory and power management design that repeats in every project comes down from months to days with Nar Series SiP products. A single SiP instead of more than 100 components, up to 61% board area savings.
Why do small-antenna tracking devices miss their location? We explain how we solve the problem of weak satellite signals and interference with the NAR-9151-E1, featuring an integrated LNA and SAW filter.
When it comes to hardware development, the first thing that comes to mind for most engineers is a long, complex, and costly process.
Setting up the layer structure correctly in Yocto is not a technical preference, but a product strategy. For teams developing SiP-based, long-lived systems with hardware variants, like Corezzle, the layer architecture is the foundation of sustainability.
The real heart of the system we call Yocto is actually BitBake. Yocto is a framework; BitBake is the engine that runs that framework.
For many developers working in the embedded Linux world, the first structure that comes to mind when the Yocto Project is mentioned is Poky.
